Documentation/driver-api/cxl/platform/cdat.rst GitHub 원문 ↗

Linux 6.18.37 · Driver API / CXL / Platform

Coherent Device Attribute Table (CDAT)

CDAT의 DSMAS·DSLBIS·SSLBIS가 CXL device DPA range와 device·switch latency 및 bandwidth를 표현하는 방식을 설명합니다.

Source pathDocumentation/driver-api/cxl/platform/cdat.rst
Source versionLinux v6.18.37
TranslationDUJINLABS 전문 번역 + 해설

요약·해설과 원문, 전문 번역을 서로 분리했습니다. API 이름, symbol, source path는 원문 표기를 사용합니다.

1. 요약·해설

원문의 핵심 논리와 kernel programming 관점의 보충 설명입니다. 아래의 전문 번역과는 별도로 작성했습니다.

요약과 해설

cdat.rst:1-118

DSMAS는 DPA range에 DSMADHandle을 부여하고 DSLBIS는 같은 handle에 device latency·bandwidth를 연결합니다. SSLBIS는 switch port 사이의 비용을 제공하며, Linux는 이 CDAT 정보에 HMAT·SRAT를 결합해 endpoint부터 root port까지의 전체 path performance coordinate를 계산합니다.

2. 영어 원문 전체

번역 기준이 된 Linux v6.18.37 원문입니다. 줄 번호는 이 버전의 파일 좌표입니다.

원문 전체 펼치기
1 .. SPDX-License-Identifier: GPL-2.0
2
3 ======================================
4 Coherent Device Attribute Table (CDAT)
5 ======================================
6
7 The CDAT provides functional and performance attributes of devices such
8 as CXL accelerators, switches, or endpoints. The table formatting is
9 similar to ACPI tables. CDAT data may be parsed by BIOS at boot or may
10 be enumerated at runtime (after device hotplug, for example).
11
12 Terminology:
13 DPA - Device Physical Address, used by the CXL device to denote the address
14 it supports for that device.
15
16 DSMADHandle - A device unique handle that is associated with a DPA range
17 defined by the DSMAS table.
18
19
20 ===============================================
21 Device Scoped Memory Affinity Structure (DSMAS)
22 ===============================================
23
24 The DSMAS contains information such as DSMADHandle, the DPA Base, and DPA
25 Length.
26
27 This table is used by Linux in conjunction with the Device Scoped Latency and
28 Bandwidth Information Structure (DSLBIS) to determine the performance
29 attributes of the CXL device itself.
30
31 Example ::
32
33 Structure Type : 00 [DSMAS]
34 Reserved : 00
35 Length : 0018 <- 24d, size of structure
36 DSMADHandle : 01
37 Flags : 00
38 Reserved : 0000
39 DPA Base : 0000000040000000 <- 1GiB base
40 DPA Length : 0000000080000000 <- 2GiB size
41
42
43 ==================================================================
44 Device Scoped Latency and Bandwidth Information Structure (DSLBIS)
45 ==================================================================
46
47 This table is used by Linux in conjunction with DSMAS to determine the
48 performance attributes of a CXL device. The DSLBIS contains latency
49 and bandwidth information based on DSMADHandle matching.
50
51 Example ::
52
53 Structure Type : 01 [DSLBIS]
54 Reserved : 00
55 Length : 18 <- 24d, size of structure
56 Handle : 0001 <- DSMAS handle
57 Flags : 00 <- Matches flag field for HMAT SLLBIS
58 Data Type : 00 <- Latency
59 Entry Basee Unit : 0000000000001000 <- Entry Base Unit field in HMAT SSLBIS
60 Entry : 010000000000 <- First byte used here, CXL LTC
61 Reserved : 0000
62
63 Structure Type : 01 [DSLBIS]
64 Reserved : 00
65 Length : 18 <- 24d, size of structure
66 Handle : 0001 <- DSMAS handle
67 Flags : 00 <- Matches flag field for HMAT SLLBIS
68 Data Type : 03 <- Bandwidth
69 Entry Basee Unit : 0000000000001000 <- Entry Base Unit field in HMAT SSLBIS
70 Entry : 020000000000 <- First byte used here, CXL BW
71 Reserved : 0000
72
73
74 ==================================================================
75 Switch Scoped Latency and Bandwidth Information Structure (SSLBIS)
76 ==================================================================
77
78 The SSLBIS contains information about the latency and bandwidth of a switch.
79
80 The table is used by Linux to compute the performance coordinates of a CXL path
81 from the device to the root port where a switch is part of the path.
82
83 Example ::
84
85 Structure Type : 05 [SSLBIS]
86 Reserved : 00
87 Length : 20 <- 32d, length of record, including SSLB entries
88 Data Type : 00 <- Latency
89 Reserved : 000000
90 Entry Base Unit : 00000000000000001000 <- Matches Entry Base Unit in HMAT SSLBIS
91
92 <- SSLB Entry 0
93 Port X ID : 0100 <- First port, 0100h represents an upstream port
94 Port Y ID : 0000 <- Second port, downstream port 0
95 Latency : 0100 <- Port latency
96 Reserved : 0000
97 <- SSLB Entry 1
98 Port X ID : 0100
99 Port Y ID : 0001
100 Latency : 0100
101 Reserved : 0000
102
103
104 Structure Type : 05 [SSLBIS]
105 Reserved : 00
106 Length : 18 <- 24d, length of record, including SSLB entry
107 Data Type : 03 <- Bandwidth
108 Reserved : 000000
109 Entry Base Unit : 00000000000000001000 <- Matches Entry Base Unit in HMAT SSLBIS
110
111 <- SSLB Entry 0
112 Port X ID : 0100 <- First port, 0100h represents an upstream port
113 Port Y ID : FFFF <- Second port, FFFFh indicates any port
114 Bandwidth : 1200 <- Port bandwidth
115 Reserved : 0000
116
117 The CXL driver uses a combination of CDAT, HMAT, SRAT, and other data to
118 generate "whole path performance" data for a CXL device.
119

3. 한국어 전문 번역

영어 원문의 문단 순서와 의미를 유지한 전체 번역입니다. 코드, 함수명, symbol과 URL은 원문 표기를 유지합니다.

CDAT의 역할과 용어

1-19 
.. SPDX-License-Identifier: GPL-2.0

Coherent Device Attribute Table(CDAT)은 CXL accelerator, switch, endpoint 같은 device의 기능 및 성능 attribute를 제공합니다. table 형식은 ACPI table과 비슷합니다. BIOS가 boot 시 CDAT data를 parse할 수도 있고 device hotplug 이후처럼 runtime에 열거할 수도 있습니다.

이 문서에서 사용하는 용어는 다음과 같습니다.

  • DPA(Device Physical Address): CXL device가 자신이 지원하는 address를 나타낼 때 사용하는 주소입니다.
  • DSMADHandle: DSMAS table이 정의한 DPA range와 연결되는 device 고유 handle입니다.

Device Scoped Memory Affinity Structure

20-42

DSMAS에는 DSMADHandle, DPA Base, DPA Length 같은 정보가 들어 있습니다. Linux는 DSMAS를 DSLBIS(Device Scoped Latency and Bandwidth Information Structure)와 함께 사용해 CXL device 자체의 성능 attribute를 결정합니다.

Structure Type : 00 [DSMAS]
      Reserved : 00
        Length : 0018              <- 24d, size of structure
   DSMADHandle : 01
         Flags : 00
      Reserved : 0000
      DPA Base : 0000000040000000  <- 1GiB base
    DPA Length : 0000000080000000  <- 2GiB size
DSMAS DPA range
FieldValueMeaning
Structure Type00DSMAS
Length001824 bytes
DSMADHandle01DSLBIS와 연결할 device handle
DPA Base00000000400000001GiB base
DPA Length00000000800000002GiB range

DSMADHandle 01이 1GiB base에서 시작하는 2GiB DPA range를 식별합니다.

Device Scoped Latency and Bandwidth Information

43-73

Linux는 DSLBIS를 DSMAS와 함께 사용해 CXL device의 성능 attribute를 결정합니다. DSLBIS에는 DSMADHandle matching을 기준으로 한 latency와 bandwidth 정보가 들어 있습니다.

  Structure Type : 01 [DSLBIS]
        Reserved : 00
          Length : 18                     <- 24d, size of structure
          Handle : 0001                   <- DSMAS handle
           Flags : 00                     <- Matches flag field for HMAT SLLBIS
       Data Type : 00                     <- Latency
Entry Basee Unit : 0000000000001000       <- Entry Base Unit field in HMAT SSLBIS
           Entry : 010000000000           <- First byte used here, CXL LTC
        Reserved : 0000

  Structure Type : 01 [DSLBIS]
        Reserved : 00
          Length : 18                     <- 24d, size of structure
          Handle : 0001                   <- DSMAS handle
           Flags : 00                     <- Matches flag field for HMAT SLLBIS
       Data Type : 03                     <- Bandwidth
Entry Basee Unit : 0000000000001000       <- Entry Base Unit field in HMAT SSLBIS
           Entry : 020000000000           <- First byte used here, CXL BW
        Reserved : 0000
DSLBIS latency와 bandwidth
MetricData TypeHandleEntry Base UnitEntry
Latency0000010000000000001000010000000000
Bandwidth0300010000000000001000020000000000

같은 DSMAS handle 0001에 latency와 bandwidth record가 각각 연결됩니다.

Switch Scoped Latency and Bandwidth Information

74-118

SSLBIS에는 switch의 latency와 bandwidth 정보가 들어 있습니다.

CXL path에 switch가 포함되면 Linux는 이 table을 사용해 device에서 root port까지의 path performance coordinate를 계산합니다.

 Structure Type : 05 [SSLBIS]
       Reserved : 00
         Length : 20                           <- 32d, length of record, including SSLB entries
      Data Type : 00                           <- Latency
       Reserved : 000000
Entry Base Unit : 00000000000000001000         <- Matches Entry Base Unit in HMAT SSLBIS

                                               <- SSLB Entry 0
      Port X ID : 0100                         <- First port, 0100h represents an upstream port
      Port Y ID : 0000                         <- Second port, downstream port 0
        Latency : 0100                         <- Port latency
       Reserved : 0000
                                               <- SSLB Entry 1
      Port X ID : 0100
      Port Y ID : 0001
        Latency : 0100
       Reserved : 0000


 Structure Type : 05 [SSLBIS]
       Reserved : 00
         Length : 18                           <- 24d, length of record, including SSLB entry
      Data Type : 03                           <- Bandwidth
       Reserved : 000000
Entry Base Unit : 00000000000000001000         <- Matches Entry Base Unit in HMAT SSLBIS

                                               <- SSLB Entry 0
      Port X ID : 0100                         <- First port, 0100h represents an upstream port
      Port Y ID : FFFF                         <- Second port, FFFFh indicates any port
      Bandwidth : 1200                         <- Port bandwidth
       Reserved : 0000
SSLBIS switch port 성능
MetricPort XPort YValueMeaning
Latency010000000100upstream to downstream port 0
Latency010000010100upstream to downstream port 1
Bandwidth0100FFFF1200upstream to any downstream port

upstream port 0100과 downstream port 사이의 latency 및 any-port bandwidth record를 정리했습니다.

CXL driver는 CDAT, HMAT, SRAT와 그 밖의 data를 조합해 CXL device의 `whole path performance` data를 생성합니다.